IN/0200 - INTEGRATED CIRCUITS
Academic Year 2021/2022
Free text for the University
MASSIMO BARBARO (Tit.)
- Teaching style
- Lingua Insegnamento
|[70/83] ELECTRONIC ENGINEERING||[83/00 - Ord. 2018] PERCORSO COMUNE||10||100|
Acquiring knowledge and understanding: understand the basic mechanisms of integrated circuits.
Applying knowledge and understanding: develop the ability to analyze an integrated circiut.
Making informed judgement and choices: develop the ability to properly use CAD/EDA tools and decide a design approach for integrated circuits
Communicating knowledge and understanding: getting the technical language of design.
Capacities to continue learning: ability to read a datasheet and apply theory to development of integrated circuits
Basic knowledge of Electron Devices (MOS) and Circuit Theory.
Boolean algebra and logic networks.
Introduction to electronic systems
Basic design concepts (analog vs. digital)
MOS transistor - Fabrication process Layers - Equations Simulation and design models (analog and digital) Layout
Noise origin (thermal, flicker, shot) Circuit noise Signal-to-noise ratio
Voltage transfer characteristic (VTC) Noise margins Layout - Propagation delay Power consumption - Sizing
Static logic gates (CMOS, pass-transistor) Dynamic logic gates (domino, NP logic) Latch and flip-flop
Characteristic of memories Architectures ROM RAM non-volatile RAM Circuit elements (memory cells, sense amplifier)
Special purpose CMOS circuits
Schmitt Trigger Multivibrators - Input buffers Charge pump Phase-Locked Loop and Delay-Locked Loop
Digital design flow (synthesis, place&route).
Simple current mirror Cascode Biasing circuits
Characteristics Biasing - Basic topologies (Common-Source, Common-gate, Source-follower) Cascode Push-pull
Characteristics Differential pair Cascode differential amplifiers Common-Mode Rejection Ratio (CMRR) Differential pair with active load Fully-Differential circuits
MOS-resistor voltage references Bandgap
Two stage Op-Amp Operational Transconductance Amplifier (OTA) Biasing Common-Mode Feedback (CMFB)
Design methodology: gm over Id
MOS switch Sample&Hold Comparators Switched-capacitors circuits
Lectures (70h) and lab sessions (30h). Lectures are interactive and meant to stimulate the students to propose solutions and ideas.
Verification of learning
Written exam (4 exercises)and discussion. The final grade is the average.
Students who attend the lectures will have the opportunity to partition the exam in 2 written partial exams that will take place according to the faculty calendar. Final grade is the average of the grades obtained in the 2 partial exams.
The main aim of the written exam is to verify the acquired skills in terms of circuit analysis and design.
Analysis: the student will be asked to analyze a circuit and identify some figures of merit; as an example, given a logic gate determine propagation delay or power consumption.
Design: given a set of specs, the student will be asked to choose the proper circuit topology and size the components such as transistors, capacitors and resistors; as an example, given bandwidth, power consumption and gain, sizing all the device of an OTA.
The oral exam has the aim to verify the skills in terms of circuit theory and design techniques and to verify if the capability to solve the exercises derives from a deep comprehension of the design methodology.
Digital Integrated Circuits:
J. Rabaey, A. Chandrakasan, B. Nikolic, "Digital Integrated Circuits, 2nd Edition", Pearson, ISBN-9780130909961
Analog Integrated Circuits:
T. Carusone, D. Johns, K. Martin, "Analog Integrated Circuit Design 2e", Wiley; ISBN: 978-1-118-09233-0
Suggested for further reading
“CMOS: Circuit Design, Layout and Simulation” – Jacob Baker – Ed. Wiley,
To meet specific educational needs related to the epidemiological situation, it is possible that some lectures will be live streamed or that recording of the lectures will be made available online. Furthermore, the lab sessions could be carried out through forms of remote interaction with the available IT supports.