Title:  Reconfigurable Coprocessors Synthesis in the MPEG-RVC Domain
Internal authors: 
Issue Date:  2015
Authors:  Sau C; Fanni L; Meloni P; Raffo L; Palumbo F
International coauthors:  no
Language:  Inglese
Book title:  Conference on Reconfigurable Computing and FPGAs
ISBN:  978-1-4673-9406-2
Conference section:  contributo
First page:  1
Last page:  8
Number of pages:  8
ISI identifier:  WOS:000380437700060
Peer review:  Esperti anonimi
Conference name:  Reconfigurable Computing and FPGAs
Conference date:  7-9 Dicembre
Conference place:  Cancun (MEX)
Abstract:  Flexibility and high efficiency are common design drivers in the embedded systems domain. Coarse-grained recon- figurable coprocessors can tackle these issues, but they suffer of complex design, debugging and applications mapping problems. In this paper, we propose an automated design flow that aids developers in design and managing coarse-grained reconfigurable coprocessors. It provides both the hardware IP and the software drivers, featuring two different levels of coupling with the host processor. The presented solution has been tested on a JPEG codec, targeting a commercial Xilinx Virtex-5 FPGA.
Type: 4.1 Contributo in Atti di convegno

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